1. Field of the Invention
The present invention relates to a temperature protected power transistor circuit for detecting in a short time the temperature of a silicon power transistor of which the base area and emitter area are formed by a double diffusion process.
2. Description of the Prior Art
Temperature protected power transistor circuits are used in a variety of forms to provide an essential protection function for power transistors used in the power control field.
An example of a conventional power transistor temperature protection circuit of this type is described below with reference to the figures.
The basic structure of a conventional temperature protected power transistor circuit is shown in FIG. 4. The base area and emitter area of the silicon power transistor chip 1 are formed by a double diffusion process. The silicon power transistor chip 1 comprises a copper heat sink 6 connected to the collector terminal, a power transistor base terminal 7, and a power transistor emitter terminal 8.
The integrated circuit (IC) 12 is another silicon chip formed discretely from the silicon power transistor chip 1. The IC 12 comprises a voltage source 5, constant current source 18, temperature detection output transistor 20, an output terminal pull-up resistor 21, power supply terminal 25, output terminal 26, ground terminal 24, resistors 27 and 28 for setting the detection temperature, and a temperature detection transistor 29. The silicon transistor chip 1 and the IC 12 are mounted on a common board 30.
FIG. 5 is a plan view showing how a hybrid integrated circuit device using the temperature protected power transistor circuit device shown in FIG. 4 is mounted; like parts are indicated by like reference numerals in FIGS. 4 and 5. The collector terminal 6 is made of copper, the components of this system are mounted on a hybrid integrated circuit mounting board 30, and the IC 12 is connected to the mounting board 30 using bonding wires 31.
The structure of the temperature protected power transistor circuit thus comprised is described below.
It should first be noted that the silicon power transistor 1 formed on the hybrid integrated circuit mounting board 30 is used in some power control circuit, such as a power amplifier. The collector loss of the silicon power transistor 1 occurring during normal operation is presented in a form of heat which is dissipated from the copper collector terminal 6. When this heat is conducted through the hybrid integrated circuit mounting board 30 to the IC 12 formed from a discrete silicon chip and the temperature detection transistor 29 reaches a predetermined temperature level, the temperature detection output terminal 26 changes from an OFF to an ON (LOW.fwdarw.HIGH) state. In general, the allowable collector loss of the silicon power transistor 1 is limited, and thermal breakdown occurs when heat generation exceeds this allowable limit.
FIG. 6 is a cross section of a transistor wherein the base area and emitter area are formed by a double diffusion process. Shown in FIG. 6 are the emitter area 32, base area 33, collector high resistivity area 34, collector high impurities concentration area 35, and collector back 36. In a bipolar transistor in which the base area and emitter area are formed by a double diffusion process as shown in FIG. 6, there is no diffusion process that completely isolates the individual elements electrically. In particular, because the collector electrode is provided as a common electrode, it is impossible to form functional circuits combining plural active elements or passive elements, and it is impossible to form a temperature protection circuit on the power transistor chip.
As a result, temperature protected power transistor circuits are generally formed on a separate board from the power transistor chip.
However, a temperature gradient develops due to the heat transmission delay time and the heat resistance of the silicon power transistor 1 in the conventional temperature protected power transistor circuit described above because the temperature detection transistor 29 is formed in the IC 12 of a separate silicon chip. As a result, it is not possible to detect sudden temperature peaks in the silicon chip 1 within extremely short periods (e.g., several ten to several hundred milliseconds).